A p-channel non-volatile memory (NVM) transistor is programmed by shifting the threshold voltage of the transistor. The threshold voltage is shifted by introducing a programming current to the gate electrode of the transistor, and simultaneously introducing a negative bias to the transistor. The threshold voltage of the p-channel NVM transistor is shifted in response to the negative bias condition and the heat generated by the programming current. The high temperature accelerates the threshold voltage shift. The threshold voltage shift is accompanied by an agglomeration of material in the gate electrode. The agglomeration of material in the gate electrode is an indication of the high temperature reached during programming. The threshold voltage shift of the p-channel NVM transistor is permanent.

 
Web www.patentalert.com

< Semiconductor device obtained by dividing semiconductor wafer by use of laser dicing technique and method of manufacturing the same

< Optimized model and parameter selection for optical metrology

> Reduced dielectric constant spacer materials integration for high speed logic gates

> Trench sidewall passivation for lateral RIE in a selective silicon-on-insulator process flow

~ 00283