Disclosed is a semiconductor device having a plurality of memory cells arranged in a first direction and a second direction perpendicular to the first direction, each memory cell comprising a first insulating film formed on a semiconductor substrate, a floating gate formed on the first insulating film, a second insulating film which includes a first portion formed on a top surface of the floating gate and a second portion formed on that side surface of the floating gate which is parallel to the first direction, and a control gate which covers the first and second portions of the second insulating film, a width in the second direction of the floating gate increasing with increasing distance from its bottom, and a width in the second direction of the second portion of the second insulating film decreasing with increasing distance from its bottom.