A digital signal processor operates in conjunction with a scheduler hardware module and a scheduler software module in executing a highest priority runnable event among a plurality of events. The scheduler hardware module communicates an interrupt request signal to the DSP that is indicative of any change in a highest priority runnable event. The scheduler software module is executed by the DSP in response to the interrupt request signal indicating a change in highest priority runnable event. An execution of the scheduler software module by the DSP implements one of a various modes of an interrupt request routine.