A method of manufacturing a flash memory device, including the steps of laminating a tunnel oxide film and a first polysilicon layer on a region of a semiconductor substrate, and forming isolation films having a step with a first polysilicon layer between the tunnel oxide film and the first polysilicon layer; forming insulating film spacers on sidewalls of the isolation films and then depositing a second polysilicon layer on the entire structure; and, etching the second polysilicon layer with a slope using a mask, thus forming a floating gate, and then forming a conductive layer on the entire structure, wherein the second polysilicon layer is etched up to the tunnel oxide film. The insulating film spacers are formed on the sidewalls of the isolation films so that they serve as barriers when the floating gate is etched. The etch depth of the floating gate can be deeply formed, making it possible to reduce the inter-cell interference phenomenon.