In an exemplary layout structure of a semiconductor integrated circuit manufactured by a photolithographic process using an exposing light having a wavelength .lamda., a peripheral circuit region is formed by arranging a plurality of peripheral circuit cells, each having peripheral circuit patterns, along a side of an internal circuit region. A proximity dummy region is formed by arranging a plurality of proximity dummy cells, each having a proximity dummy pattern, along at least one side of the peripheral circuit region. The proximity dummy region includes a line-and-space repetition structure including, and having the regularity of, two or more pairs of lines and spaces between the lines every 8.lamda.. The repetition structure in the proximity dummy region reduces the dimensional deviation in the outermost portion of the peripheral circuit region.