A processor includes an address specifying unit that specifies an address range on a virtual storage area; an instruction code setting unit that sets an instruction code for a process of deciding data corresponding to the specified address range; a calculating unit that calculates the data corresponding to the address range, according to the instruction code set for the address range; a load instruction obtaining unit that obtains a load instruction for the specified address range; and a data output unit that supplies the data calculated by the calculating unit corresponding to the address range indicated by the load instruction, as data for the load instruction.