A field effect transistor having metallic silicide layers is formed in a semiconductor layer on an insulating layer of an SOI substrate. The metallic silicide layers are composed of refractory metal and silicon. The metallic silicide layers extend to bottom surfaces of source and drain regions. A ratio of the metal to the silicon in the metallic silicide layers is X to Y. A ratio of the metal to the silicon of metallic silicide having the lowest resistance among stoichiometric metallic silicides is X0 to Y0. X, Y, X0 and Y0 satisfy the following inequality: (X/Y)>(X0/Y0).

 
Web www.patentalert.com

< Semiconductor integrated circuits with stacked node contact structures

> Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

~ 00491