A method and structure for reducing leakage currents in integrated circuits based on a direct silicon bonding (DSB) fabrication process. After recessing a top semiconductor layer and an underlying semiconductor substrate, a dielectric layer may be deposited and etched back to form embedded spacers. Conventional source/drain regions may then be formed.

 
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> CMOS image sensor and method for manufacturing the same

> Memory cell comprising one MOS transistor with an isolated body having a reinforced memory effect

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