A semiconductor device manufacturing method includes forming circuit devices and a plurality of electrode pads within a semiconductor chip formation region. The method also includes forming, on the main surface of the semiconductor wafer, an insulating film which exposes a portion of each of the electrode pads. The method also includes forming a conducting film covering the electrode pads, on the insulating film, and forming a wiring layer on the conducting film. The method also includes forming a negative resist layer in the semiconductor chip formation region and a peripheral region. The method also includes covering protruding electrode formation regions in the semiconductor chip formation region and covering electrode portion formation regions in the peripheral region, and performing optical exposure of the negative resist layer. The method also includes forming aperture portions in the protruding electrode formation regions and a plurality of electrode portions. The aperture portions expose a portion of the wiring layer. The electrode portions are formed by exposing the conducting film. The method also includes performing plating using the resist layer as a mask to form protruding electrodes.