A single transistor ("1T") ferroelectric memory cell, device and method for the
formation of the same incorporating a high temperature ferroelectric gate dielectric.
The memory cell of the present invention comprises a substrate, an overlying ferroelectric
layer, which may comprise a film of rare earth manganite, and an interfacial oxide
layer intermediate the substrate and the ferroelectric layer. In a preferred embodiment,
the ferroelectric material utilized in an implementation of the present invention
may be deposited by metallorganic chemical vapor deposition ("MOCVD") or other
techniques and exhibits a low relative dielectric permittivity of around 10 and
forms an interfacial layer with a relative dielectric permittivity larger than
that of SiO2, which makes it particularly suitable for a 1T cell.
