A method for manufacturing integrated circuit devices including metal interconnect structures. The method includes forming a first dielectric material overlying a surface of a semiconductor substrate. The method also includes forming a metal damascene structure in the first dielectric material, which surrounds the metal damascene structure. The method selectively removes the first dielectric material surrounding a portion of the metal damascene structure to expose the portion of the metal damascene structure. The method forms a porous dielectric material surrounding a vicinity of the exposed portion of the metal damascene structure, whereupon the porous dielectric material has a dielectric constant ranging from no greater than 2.6 but greater than 1.