An improved semiconductor memory device providing row/column redundancy. The device includes a plurality of data latches arranged in a row-column matrix connected to a set of bitlines/global bitlines interfacing to read/write circuitry, at least two redundant row/column connected to a redundant bitline/global bitline, a first device for providing a first faulty row/column address in said matrix, a second device for generating other faulty row/column addresses by incrementing or decrementing predetermined numbers from the address provided by the first means, a comparison circuitry receiving as its inputs the accessed row/column address and the faulty row/column addresses, and a control block connected to the said comparison circuitry that receives a control signal such that it enables/disables the redundant and/or other memory cell row/column depending upon signals received from said comparison circuitry and control signal for normal operation of the memory device.