An improvement to a method of forming an integrated circuit. An etch stop layer is formed to overlie the front end processing layers of the integrated circuit. Support structures are formed that are disposed so as to support electrically conductive interconnects on various levels of the integrated circuit. Substantially all of the non electrically conductive layers above the etch stop layer that were formed during the fabrication of the interconnects are removed.

 
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< Tunable alignment geometry

< Semiconductor device and method for manufacturing the same

> Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization

> Lanthanide doped TiOx dielectric films by plasma oxidation

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