A semiconductor device, a layout device and a layout method in which, if the size of a via interconnecting a first conductor provided in an interconnect layer and a second conductor which is provided in an interconnect layer different from the interconnect layer of the first conductor and which intersects the first conductor by solid crossing, is not less than the line width of the first conductor, and if, in case the center point of the via is arranged on a center axis along the longitudinal direction of the first conductor, the minimum spacing cannot be maintained between the first conductor and the line neighboring to the first conductor, the center of the via, arranged on the first conductor, is placed with an offset of a predetermined value with respect to the longitudinal center axis of the first conductor, so that a spacing not less than the minimum spacing is maintained between the first conductor and the line neighboring to the first conductor and in the via placement region on the first conductor.

 
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> Electronic device having side electrode, method of manufacturing the same, and apparatus using the same

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