An interconnect for semiconductor components such as dice, wafers and chip
scale packages is provided. The interconnect includes a substrate, and
patterns of contacts formed on a face side of the substrate adapted to
electrically engage external contacts (e.g., bond pads, solder bumps) on
the components. The interconnect also includes insulated conductive
members through the substrate, which provide direct electrical paths from
the interconnect contacts to a backside of the substrate. The conductive
members can be formed by laser machining openings in the substrate, and
then filling the openings with a conductive material (e.g., metal,
conductive polymer). The conductive members can also include pads with
contact balls, configured for electrical interface with a test apparatus,
such as test carrier or wafer handler. The interconnect can be used to
construct test systems for testing semiconductor components, or to
construct chip scale packages and multi chip modules.
