A nonvolatile ferroelectric memory device includes a cell array having a multi-bitline
structure for converting a sensing voltage of a sub bitline into current to induce
a sensing voltage of a main bitline. The memory device comprises a plurality of
cell array blocks, a common data bus, a sense amplifier array unit and a reference
voltage controller. The common data bus, shared by the plurality of cell array
blocks, transmits cell data of the cell array blocks. The sense amplifier array
unit compares a reference voltage with cell data applied from the common data bus
and senses the cell data. The reference voltage controller generates an adjustable
internal reference voltage by adjusting a ferroelectric capacitance, selectively
switches the internal reference voltage and an external reference voltage applied
from a pad, and outputs the selectively switched value as the reference voltage
into the sense amplifier array unit. In the memory device, cell characteristics
can be tested without extra mask layer processes by programmably selecting reference
voltages. Additionally, weak cells are effectively repaired by regulating reference
voltages programmably, thereby improving yield and reliability of a chip.
